1. Field of the Invention
The present invention relates to a semiconductor element such as a thin film transistor (hereinafter, TFT) or a method for manufacturing a semiconductor device having a circuit composed of such the semiconductor element. For example, the present invention relates to an electro-optical device as typified by a liquid crystal display panel, an EL (electroluminescence) display device, an EC display device, or the like. Further, the present invention relates to an electrical device for improving processing speed formed by a TFT, for example, a central processing unit (CPU) and a method for manufacturing the electrical device. More specifically, the present invention relates to an electronic device mounted with the electro-optical device and the electrical device.
2. Related Art
In recent years, a TFT with higher mobility than ever is required at the request of growing a display panel in size and driving of a display panel which has an internal driver, an EL display panel, or the like.
Therefore, a TFT which has higher characteristics than those of a TFT using an amorphous semiconductor film and which is formed by a crystalline semiconductor film with a large crystal grain has been developed. The TFT using the crystalline semiconductor film has an advantage of having higher mobility than that of a TFT using an amorphous semiconductor film.
On the other hand, energy of hot carriers generated in the TFT using the crystalline semiconductor film is larger than that in the TFT using an amorphous semiconductor film because of high mobility.
As a result, deterioration of the TFT using the crystalline semiconductor film such as hot carrier deterioration is worse than that of the TFT using an amorphous semiconductor film.
When the crystallinity of the semiconductor film is improved and the level of mobility approaches that of a single crystal semiconductor, reliability of the device becomes large problem. It becomes required to suppress the deterioration of the device.
In order to improve the reliability of the device against deterioration due to hot carriers or the like, it is important to relieve an electrical field in a junction region of a source or drain region.
As a method for forming the source or drain region, there is a method, that is, a film containing a donor impurity (impurity imparting n-type conductivity) or an acceptor impurity (impurity imparting p-type conductivity) is deposited by a CVD apparatus or the like (FIG. 2A).
FIG. 2A shows an n-channel TFT in which a source or drain region is formed by depositing a film containing a donor impurity or an acceptor impurity. In FIG. 2A, reference numeral 1001 denotes a substrate; 1002, a gate electrode; 1003, a gate insulating film; 1004, a semiconductor film containing an element belonging to group 13 in the periodic table (an acceptor impurity, an impurity imparting p-type conductivity); 1005 a semiconductor film containing an element belonging to group 15 (a donor impurity, an impurity imparting n-type conductivity); and 1006, a source or drain electrode.
A semiconductor film 1005 containing an element belonging to group 15 becomes a source or drain region, whereas a region interposed between the source and drain regions 1005 among a semiconductor film 1004 containing an element belonging to group 13 becomes a channel formation region. In FIG. 2A, a region indicated by Lov is a region in which the source or drain region 1005 is overlapped with the gate electrode 1002.
However, this structure makes broadening of a depletion layer 1007 only to the extent of a thickness (approximately 200 nm) of the semiconductor film 1004 as indicated by an arrow in the diagram when drain voltage is applied (FIG. 2B), and so a large electric field is generated in the depletion layer 1007. There is a problem that carriers which receive large energy from the electric field become hot carriers which bring about avalanche or which are injected in an interface between the gate insulating film 1003 and the semiconductor film 1004 or in the gate insulating film 1003 to deteriorate the element.
As another method for manufacturing the bottom gate TFT, there is a method of injecting a donor impurity or an acceptor impurity with a doping apparatus to a region which becomes a source or drain region (FIG. 2C).
In FIG. 2C, reference numeral 1101 denotes a substrate; 1102, a gate electrode; 1103, gate insulating film; 1104, a semiconductor film containing an element belonging to group 15; 1106, a region added with an element belonging to group 13 among a semiconductor film 1104; 1105, a region which is not added with an element belonging to group 13 among a semiconductor film 1104; and 1107, a source or drain electrode.
The region 1106 added with an element belonging to group 13 among a semiconductor film 1104 is a channel formation region, whereas the region 1105 which is not added with an element belonging to group 13 among a semiconductor film 1104 is a source region or drain region. In FIG. 2C, a region indicated by Lov is a region in which the source or drain region 1105 is overlapped with the gate electrode 1102.
The channel formation region 1106 may be formed by depositing the semiconductor film 1104 containing an element belonging to group 15 by a plasma CVD and introducing an element belonging to group 13 with a doing apparatus. Alternatively, the channel formation region 1106 and the source or drain region 1105 may be formed by adding selectively elements belonging to groups 13 and 15 after forming an intrinsic semiconductor film (refer to Unexamined patent publication No. 11-154714).
A doping apparatus is expensive, and so manufacturing costs can be reduced by using a method of depositing a semiconductor film containing an impurity without a doping apparatus.